TR4 FPGA Development Kit

By Terasic Inc. 514

TR4 FPGA Development Kit

The TR4 Development Board from Terasic provides the ideal hardware platform for system designs that demand high-performance, serial connectivity, and advanced memory interfacing. Developed specifically to address the rapidly evolving requirements in many end markets for greater bandwidth, improved jitter performance, and lower power consumption, the TR4 is powered by the Stratix® IV GX device and supported by industry-standard peripherals, connectors, and interfaces that offer a rich set of features that is suitable for a wide range of compute-intensive applications.

The TR4 is supported by multiple reference designs and six High-Speed Mezzanine Card (HSMC) connectors that allow scaling and customization with mezzanine daughter cards. For large-scale ASIC prototype development, multiple TR4s can be stacked together to create an easily-customizable multi-FPGA system.

Features
  • Programmable PLL timing chip configured via MAX II CPLD
  • SMA connector pair for differential clock inputs/outputs
  • Four slide switches for user-defined inputs
  • On-board USB blaster for use with the Quartus II programmer
  • Six 172-pins high speed mezzanine card (HSMC)
  • DDR3 SO-DIMM socket (up to 4 GB capacity)
  • SMA connector for clock output
  • 64 MB flash with a 16-bit data bus
  • 2 MB SSRAM (512 K x 32)
  • SMA connector for external clock input
  • Two PCI express x4 connectors

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