High-speed CMOS SDR synchronous DRAM vetted with Insignis’ proprietary extended test flow to mitigate against early life failures, ensuring premium quality and long-term reliability for industrial use. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command.

The SDRAM provides for programmable read or write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either auto or self-refresh, are easy to use.

By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth.