CD4522BPW

CD4522BPW
Mfr. #:
CD4522BPW
説明:
Counter ICs CMOS Prog BCD Divide-By-N Counter
ライフサイクル:
メーカー新製品
データシート:
CD4522BPW データシート
配達:
DHL FedEx Ups TNT EMS
支払い:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
詳しくは:
CD4522BPW 詳しくは CD4522BPW Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
カウンターIC
JBoss:
Y
取り付けスタイル:
SMD / SMT
パッケージ/ケース:
TSSOP-16
ロジックファミリ:
CD4000
ビット数:
4 bit
カウントシーケンス:
動作供給電圧:
3 V to 18 V
最低動作温度:
- 55 C
最高作動温度:
+ 125 C
シリーズ:
CD4522B
包装:
チューブ
関数:
カウンター
動作温度範囲:
- 55 C to + 125 C
出力電流:
+/- 1.5 mA
ブランド:
テキサスインスツルメンツ
製品タイプ:
カウンターIC
ファクトリーパックの数量:
90
サブカテゴリ:
カウンターIC
単位重量:
0.002183 oz
Tags
CD4522BP, CD4522, CD452, CD45, CD4
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
CMOS Programmable BCD Divide-By-N Counter 16-TSSOP -55 to 125
***ical
Counter/Divider Single 4-Bit Decade Down 16-Pin TSSOP Tube
***ment14 APAC
LOGIC, PRG BCD DIV-BY-N CNTR, 16TSSOP; Counter Type:BCD Divide-by-N; Clock Frequency:8MHz; Count Maximum:9; Supply Voltage Range:3V to 18V; Logic Case Style:TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; SVHC:No SVHC (19-Dec-2011); Clock Frequency Max:8MHz; Logic IC Base Number:4522; Logic IC Family:CD4000; Logic IC Function:Programmable BCD Divide-by-N Counter; Package / Case:TSSOP; Supply Voltage Max:18V; Supply Voltage Min:3V; Termination Type:SMD
***TEXAS
CD4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.
***as Instr.
The CD4522B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
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可用性
ストック:
Available
注文中:
1984
数量を入力してください:
CD4522BPWの現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
参考価格(USD)
単価
小計金額
1
$0.59
$0.59
10
$0.49
$4.90
100
$0.30
$29.70
1000
$0.23
$230.00
2500
$0.20
$490.00
10000
$0.18
$1 830.00
25000
$0.17
$4 325.00
50000
$0.17
$8 450.00
2021年から半導体が不足しているため、2021年以前の通常価格以下の価格です。お問い合わせください。
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