SN74F161ADBR

Mfr. #:: SN74F161ADBR
説明:: IC COUNTER 4BIT BIN SYNC 16-SSOP
ライフサイクル:: メーカー新製品
データシート:: SN74F161ADBR データシート
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詳しくは:: SN74F161ADBR 詳しくは SN74F161ADBR Product Details

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Tags: SN74F161ADB, SN74F161AD, SN74F161, SN74F16, SN74F1, SN74F, SN74, SN7

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74F161ADBR 説明

***ser: Logic - Counters Synchronous 4-Bit Binary Counter

***i-Key: IC COUNTER 4BIT BIN SYNC 16-SSOP

***ark: Counter Logic IC; Logic Family:F; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:16-SSOP; No. of Pins:16; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes

***as Instruments: This synchronous, presettable, 4-bit binary counter has internal carry look-ahead circuitry for use in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. However, counting spikes can occur on the ripple-carry (RCO) output. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of CLK. This counter is fully programmable. That is, it can be preset to any number between 0 and 15. Because presetting is synchronous, a low logic level at the load (LOAD\) input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of ENP and ENT. The clear function is asynchronous, and a low logic level at the clear (CLR\) input sets all four of the flip-flop outputs to low, regardless of the levels of CLK, LOAD\, ENP, and ENT. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications, without additional gating. This function is implemented by the ENP and ENT inputs and an RCO output. Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. RCO, thus enabled, produces a high-logic-level pulse while the count is 15 (HHHH). The high-logic-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK. The SN74F161A features a fully independent clock circuit. Changes at ENP, ENT, or LOAD\ that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the setup and hold times.

Market price

モデル	説明	ストック
SN74F161ADBR DISTI # SN74F161ADBR-ND	IC COUNTER 4BIT BIN SYNC 16-SSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
SN74F161ADBRE4 DISTI # SN74F161ADBRE4-ND	IC COUNTER 4BIT BIN SYNC 16-SSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
SN74F161ADBRG4 DISTI # SN74F161ADBRG4-ND	IC COUNTER BINARY 4BIT 16SSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
SN74F161ADBRE4 DISTI # SN74F161ADBRE4	- Bulk (Alt: SN74F161ADBRE4) Min Qty: 1 Container: Bulk	Americas - 0
SN74F161ADBRG4 DISTI # SN74F161ADBRG4	- Bulk (Alt: SN74F161ADBRG4) Min Qty: 1 Container: Bulk	Americas - 0

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