DC1151A-E

Mfr. #:: DC1151A-E
メーカー:: Analog Devices Inc.
説明:: Data Conversion IC Development Tools LTC2273CUJ - 16-Bit, 80Msps Serial ADC,
ライフサイクル:: メーカー新製品
データシート:: DC1151A-E データシート
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HTML Datasheet:: DC1151A-E Datasheet DC1151A-E Datasheet (P4-P6)DC1151A-E Datasheet (P7)
ECAD Model:
詳しくは:: DC1151A-E 詳しくは DC1151A-E Product Details

製品属性
属性値

メーカー：: アナログ・デバイセズ

製品カテゴリ：: データ変換IC開発ツール

JBoss：: Y

製品：: デモンストレーションボード

タイプ：: ADC

ツールは以下の評価用です：: LTC2273

動作供給電圧：: 3.135 V to 3.465 V

シリーズ：: LTC2273

ブランド：: アナログ・デバイセズ

製品タイプ：: データ変換IC開発ツール

ファクトリーパックの数量：: 1

サブカテゴリ：: 開発ツール

Tags: DC1151, DC115, DC11, DC1

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Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC1151A-E 説明

***ical: LTC2273 ADC Demonstration Circuit 80MSPS Pscope IDE

***ponent Distributors Inc.: LTC2273CUJ Evaluation Kit (Fin= 1-70MHz)

***hardson RFPD: LINEAR ICS - EVALUATION BOARD

***i-Key: EVAL BOARD FOR LTC2273

***ment14 APAC: DEMO BOARD, ADC

***ark: Demo Board, Adc; Silicon Manufacturer:linear Technology; Silicon Core Number:ltc2273; No. Of Bits:16Bit; Sample Rate:80Msps; Kit Application Type:data Converter; Application Sub Type:adc; Kit Contents:demo Board Ltc2273 Rohs Compliant: Na

***log Devices: The LTC2273/LTC2272 are 80Msps/65Msps, 16-bit A/D converters with a high speed serial interface. They are designed for digitizing high frequency, wide dynamic range signals with an input bandwidth of 700MHz. The input range of the ADC can be optimized using the PGA front end. The output data is serialized according to the JEDEC serial interface for data converters specification (JESD204). The LTC2273/LTC2272 are perfect for demanding applications where it is desirable to isolate the sensitive analog circuits from the noisy digital logic. The AC performance includes a 77.7dB Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low internal jitter of 80fs RMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4.5LSB INL and ±1LSB DNL (no missing codes) over temperature. The encode clock inputs, ENC+ and ENC–, may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. A clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE

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