SN74LVC646ADWRG4

SN74LVC646ADWRG4
Mfr. #:
SN74LVC646ADWRG4
説明:
Bus Transceivers Octal Bus Transceivr And Register
ライフサイクル:
メーカー新製品
データシート:
SN74LVC646ADWRG4 データシート
配達:
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ECAD Model:
詳しくは:
SN74LVC646ADWRG4 詳しくは SN74LVC646ADWRG4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
バストランシーバー
JBoss:
Y
ロジックファミリ:
LVC
入力レベル:
LVTTL
出力レベル:
LVTTL
出力タイプ:
3-State
高レベル出力電流:
- 24 mA
低レベル出力電流:
24 mA
伝播遅延時間:
8.8 ns
供給電圧-最大:
3.6 V
供給電圧-最小:
1.65 V
最低動作温度:
- 40 C
最高作動温度:
+ 85 C
パッケージ/ケース:
SOIC-24
包装:
リール
関数:
バストランシーバー/レジスター
高さ:
2.35 mm
長さ:
15.4 mm
回路数:
1
製品:
CMOS
テクノロジー:
CMOS
幅:
7.52 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8
供給電流-最大:
10 uA
動作供給電圧:
1.8 V, 2.5 V, 3.3 V
極性:
非反転
製品タイプ:
バストランシーバー
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
トリガータイプ:
ポジティブエッジ
単位重量:
0.022025 oz
Tags
SN74LVC646ADWR, SN74LVC646ADW, SN74LVC646AD, SN74LVC646A, SN74LVC64, SN74LVC6, SN74LVC, SN74LV, SN74L, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***sener Electronics
IC BUS TRANSCEIVER 8BIT 24SOIC
***as Instruments
The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation. These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC646A devices. Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at thehigh-impedance port is stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data is stored in one register and B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
モデル 説明 ストック 価格
SN74LVC646ADWRG4
DISTI # SN74LVC646ADWRG4-ND
IC TXRX NON-INVERT 3.6V 24SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVC646ADWRG4
    DISTI # 595-SN74LVC646ADWRG4
    Bus Transceivers Octal Bus Transceivr And Register
    RoHS: Compliant
    0
      画像 モデル 説明
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      Mfr.#: SN74LVC646APWR TSSOP24

      OMO.#: OMO-SN74LVC646APWR-TSSOP24-1190

      ブランドニューオリジナル
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      Mfr.#: SN74LVC652ADBRG4

      OMO.#: OMO-SN74LVC652ADBRG4-TEXAS-INSTRUMENTS

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      可用性
      ストック:
      Available
      注文中:
      3500
      数量を入力してください:
      SN74LVC646ADWRG4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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