SN74ALS580BDWE4

SN74ALS580BDWE4
Mfr. #:
SN74ALS580BDWE4
説明:
Latches Octal DType Transparent Latches
ライフサイクル:
メーカー新製品
データシート:
SN74ALS580BDWE4 データシート
配達:
DHL FedEx Ups TNT EMS
支払い:
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ECAD Model:
詳しくは:
SN74ALS580BDWE4 詳しくは SN74ALS580BDWE4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ラッチ
JBoss:
Y
回路数:
8 Circuit
ロジックタイプ:
Dタイプ透明ラッチ
ロジックファミリ:
ALS
極性:
反転
出力ラインの数:
8 Line
高レベル出力電流:
- 2.6 mA
低レベル出力電流:
32 mA
伝播遅延時間:
18 ns
供給電圧-最大:
5.5 V
供給電圧-最小:
4.5 V
最低動作温度:
0 C
最高作動温度:
+ 70 C
パッケージ/ケース:
SOIC-20
包装:
チューブ
関数:
透明
高さ:
2.35 mm
長さ:
12.8 mm
出力タイプ:
3-State
タイプ:
Dタイプ
幅:
7.52 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8 Channels
入力行数:
8 Line
動作供給電流:
26 mA
動作供給電圧:
5 V
製品タイプ:
ラッチ
リセットタイプ:
リセットなし
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.019048 oz
Tags
SN74ALS580BD, SN74ALS580B, SN74ALS58, SN74ALS5, SN74ALS, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC LATCH TRANSP OCTAL D 20-SOIC
***ark
ICs, Latches Logic; Logic Family:ALS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:20-SOIC; No. of Pins:20; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
***as Instruments
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered output-enable input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS580B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
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可用性
ストック:
Available
注文中:
4000
数量を入力してください:
SN74ALS580BDWE4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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