AD9265-105EBZ

Mfr. #:: AD9265-105EBZ
メーカー:: Analog Devices Inc.
説明:: AD9265 ADC Evaluation Board 105MSPS
ライフサイクル:: メーカー新製品
データシート:: AD9265-105EBZ データシート
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詳しくは:: AD9265-105EBZ 詳しくは AD9265-105EBZ Product Details

製品属性
属性値

Tags: AD9265, AD926, AD92, AD9

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AD9265-105EBZ 説明

***et Europe: Evaluation Board For Analog-To-Digital Converter 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V

***ical: AD9265 ADC Evaluation Board 105MSPS

***i-Key: BOARD EVALUATION 105MSPS AD9265

***hardson RFPD: LINEAR ICS - EVALUATION BOARD

***log Devices: The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range. The ADC features a wide bandwidth differential sample-and- hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for vari- ations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design consid- erations. The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic. Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on- chip dither function is available to improve SFDR performance with low power analog input signals. The AD9265 is available in a Pb-free, 48-lead LFCSP and is speci- fied over the industrial temperature range of −40°C to +85°C. Applications Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipment Product Highlights On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock duty cycle stabilizer, DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9255, allowing a simple migration from 16 bits down to 14 bits.

Market price

モデル	メーカー	説明	ストック	価格
AD9265-105EBZ DISTI # V36:1790_06215934	Analog Devices Inc	AD9265 ADC Evaluation Board 105MSPS RoHS: Compliant	0	1000:$215.5500 500:$215.5600 100:$217.7400 10:$223.0400 1:$224.0200
AD9265-105EBZ DISTI # AD9265-105EBZ-ND	Analog Devices Inc	BOARD EVALUATION 105MSPS AD9265 RoHS: Compliant Min Qty: 1 Container: Box	Limited Supply - Call
AD9265-105EBZ DISTI # 584-AD9265-105EBZ	Analog Devices Inc	Data Conversion IC Development Tools AD9265 Eval Brd 105 Msps RoHS: Compliant	1	1:$224.0200

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