SN74AC563DWRE4

Mfr. #:: SN74AC563DWRE4
説明:: IC OCTAL D TRANSP LATCH 20-SOIC
ライフサイクル:: メーカー新製品
データシート:: SN74AC563DWRE4 データシート
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ECAD Model:
詳しくは:: SN74AC563DWRE4 詳しくは SN74AC563DWRE4 Product Details

製品属性
属性値

メーカー: テキサスインスツルメンツ

製品カテゴリ: ロジック-ラッチ

シリーズ: 74AC

包装: テープ＆リール（TR）代替パッケージ

パッケージ-ケース: 20-SOIC (0.295", 7.50mm Width)

作動温度: -40°C ~ 85°C

取付タイプ: 表面実装

出力タイプ: トライステート

電圧供給: 2 V ~ 6 V

サプライヤー-デバイス-パッケージ: 20-SOIC

回路: 1899/12/30 8:08:00

電流-出力-高-低: 24mA, 24mA

ロジックタイプ: Dタイプ透明ラッチ

独立系プロレス団体: 1

遅延時間の伝播: 4.6ns

Tags: SN74AC563DWR, SN74AC563DW, SN74AC563D, SN74AC563, SN74AC56, SN74AC5, SN74AC, SN74A, SN74, SN7

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74AC563DWRE4 説明

***i-Key: IC OCTAL D TRANSP LATCH 20-SOIC

***eco: OCTAL D-TYPE TRANSPARENT LATCH W/ 3-ST<AZ

***as Instruments: The AC563 devices are octal D-type transparent latches with 3-state outputs. When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse logic levels set up at the D inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. (OE)\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Market price

モデル	説明	ストック	価格
SN74AC563DWRE4 DISTI # SN74AC563DWRE4-ND	IC OCTAL D TRANSP LATCH 20-SOIC RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
SN74AC563DWRE4 DISTI # 595-SN74AC563DWRE4	Latches Octal D-Type Transp RoHS: Compliant	0

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