AD9572ACPZLVD-R7

Mfr. #:: AD9572ACPZLVD-R7
メーカー:: Analog Devices Inc.
説明:: Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output
ライフサイクル:: メーカー新製品
データシート:: AD9572ACPZLVD-R7 データシート
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詳しくは:: AD9572ACPZLVD-R7 詳しくは AD9572ACPZLVD-R7 Product Details

製品属性
属性値

メーカー: アナログ・デバイセズ

製品カテゴリ: クロック/タイミング-クロックジェネレータ、PLL、周波数シンセサイザ

シリーズ: AD9572

タイプ: クロックジェネレータ、ファンアウト分配、マルチプレクサ

包装: Digi-ReelR代替パッケージ

取り付けスタイル: SMD / SMT

パッケージ-ケース: LFCSP-40

作動温度: -40°C ~ 85°C

取付タイプ: 表面実装

出力タイプ: LVPECL

電圧供給: 2.97 V ~ 3.63 V

サプライヤー-デバイス-パッケージ: 40-LFCSP-WQ (6x6)

PLL: はい

入力: 結晶

出力: CMOS、LVDS、LVPECL

回路数: 1

比率-入力：出力: 1899/12/30 1:07:00

差動入力：出力: いいえはい

周波数-最大: 156.25MHz

除算器-乗数: はい・いいえ

最高作動温度: + 85 C

最低作動温度: - 40 C

供給-電圧-最大: 3.6 V

最大出力周波数: 156.25 MHz

乗算-除数-ファクター: 1

Tags: AD9572ACPZL, AD9572, AD957, AD95, AD9

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We guarantee 100% customer satisfaction.

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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

AD9572ACPZLVD-R7 説明

***et Europe: PLL Frequency Synthesizer Dual 40-Pin LFCSP EP T/R

***i-Key: IC PLL CLOCK GEN 25MHZ 40LFCSP

***log Devices: The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequencysynthesizers to maximize network performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. The PLL section consists of a low noise phase frequency detector (PFD), a precision charge pump (CP), a low phase noise voltage controlled oscillator (VCO), and a preprogrammed feedback divider and output divider. By connecting an external crystal or reference clock to the REFCLK pin, frequencies up to 156.25 MHz can be locked to the input reference. Each output divider and feedback divider ratio is preprogrammed for the required output rates. A second PLL also operates as an integer-N synthesizer and drives two LVPECL or LVDS output buffers for 106.25 MHz operation. No external loop filter components are required, thus conserving valuable design time and board space. The AD9572 is available in a 40-lead, 6 mm × 6 mm lead frame chip scale package (LFCSP) and can be operated from a single 3.3 V supply. The temperature range is -40°C to +85°C. APPLICATIONS Fiber channel line cards, switches, and routers Gigabit Ethernet/PCIe support included Low jitter, low phase noise clock generation

AD9572ACPZLVD-R7 詳しくは

Clock & Timing ADI SLP

Market price

モデル	メーカー	説明	ストック	価格
AD9572ACPZLVD-R7 DISTI # AD9572ACPZLVD-R7TR-ND	Analog Devices Inc	IC PLL CLOCK GEN 25MHZ 40LFCSP RoHS: Compliant Min Qty: 750 Container: Tape & Reel (TR)	Temporarily Out of Stock	750:$7.8010
AD9572ACPZLVD DISTI # 584-AD9572ACPZLVD	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	14	1:$11.3000 10:$10.2500 25:$9.6300 50:$9.2800 100:$8.3400 250:$7.7100 500:$7.2500 1000:$6.5900
AD9572ACPZLVD-R7 DISTI # 584-AD9572ACPZLVD-R7	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	0	750:$6.5900
AD9572ACPZLVD-RL DISTI # 584-AD9572ACPZLVD-R	Analog Devices Inc	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output RoHS: Compliant	0	2500:$6.5900

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	Mfr.#: AD9572ACPZLVD OMO.#: OMO-AD9572ACPZLVD-ANALOG-DEVICES-INC-ADI	Clock Drivers & Distribution Fiber CH/ PLL Core 7 Clock Output